# THIS FILE IS AUTOMATICALLY GENERATED
# Project: X:\roboticscode\trunk\psoc\psoc_creator_2.2\test\Counter02\Counter02.cydsn\Counter02.cyprj
# Date: Sat, 21 Feb 2015 14:43:14 GMT
#set_units -time ns
create_clock -name {clock_1(routed)} -period 5000000 -waveform {0 2500000} [list [get_pins {ClockBlock/dclk_0}]]
create_clock -name {CyIMO} -period 333.33333333333331 -waveform {0 166.666666666667} [list [get_pins {ClockBlock/imo}]]
create_clock -name {CyPLL_OUT} -period 41.666666666666664 -waveform {0 20.8333333333333} [list [get_pins {ClockBlock/pllout}]]
create_clock -name {CyILO} -period 1000000 -waveform {0 500000} [list [get_pins {ClockBlock/ilo}] [get_pins {ClockBlock/clk_100k}] [get_pins {ClockBlock/clk_1k}] [get_pins {ClockBlock/clk_32k}]]
create_clock -name {CyMASTER_CLK} -period 41.666666666666664 -waveform {0 20.8333333333333} [list [get_pins {ClockBlock/clk_sync}]]
create_generated_clock -name {clock_1} -source [get_pins {ClockBlock/clk_sync}] -edges {1 120001 240001} [list [get_pins {ClockBlock/dclk_glb_0}]]
create_generated_clock -name {CyBUS_CLK} -source [get_pins {ClockBlock/clk_sync}] -edges {1 2 3} [list [get_pins {ClockBlock/clk_bus_glb}]]


# Component constraints for X:\roboticscode\trunk\psoc\psoc_creator_2.2\test\Counter02\Counter02.cydsn\TopDesign\TopDesign.cysch
# Project: X:\roboticscode\trunk\psoc\psoc_creator_2.2\test\Counter02\Counter02.cydsn\Counter02.cyprj
# Date: Sat, 21 Feb 2015 14:43:06 GMT
